62001. A 4-bit R/2R D/A converter has a reference of 5 V. What is the analog output for the input code 0101?
62002. Which of the following describes the basic operation of a single-slope A/D converter.
62003. Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?
62004. Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate?
62005. What is the major advantage of ECL logic?
62006. As a general rule, the lower the value of the speed–power product, the better the device because of its:
62007. What is the range of invalid TTL output voltage?
62008. What is the difference between the 54XX and 74XX series of TTL logic gates?
62009. An open collector output can ________ current, but it cannot ________.
62010. Why is a decoupling capacitor needed for TTL ICs and where should it be connected?
62011. Using the schematic diagram of a TTL NAND gate, determine the state of each transistor (ON or OFF) when all inputs are high.
62012. If all inputs to a TTL NAND gate are low, what is the ON, OFF condition of each transistor in the circuit?
62013. Which of the following summarizes the important features of emitter-coupled logic (ECL)?
62014. Why is a pull-up resistor needed for an open collector gate?
62015. Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?
62016. The word "interfacing" as applied to digital electronics usually means:
62017. The rise time (tr) is the time it takes for a pulse to rise from its ________ point up to its ________ point. The fall time (tf) is the length of time it takes to fall from the ________ to the ________ point.
62018. The term buffer/driver signifies the ability to provide low output currents to drive light loads.
62019. PMOS and NMOS ________.
62020. Why is the operating frequency for CMOS devices critical for determining power dissipation?
62021. Ten TTL loads per TTL driver is known as:
62022. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
62023. Sufficient Stamp should be affixed if the value exceeds:
62024. The high input impedance of MOSFETs:
62025. The output current capability of a single 7400 NAND gate when HIGH is called ________.
62026. The time needed for an output to change from the result of an input change is known as:
62027. The problem of interfacing IC logic families that have different supply voltages (VCC's) can be solved by using a:
62028. What is the advantage of using low-power Schottky (LS) over standard TTL logic?
62029. When is a level-shifter circuit needed in interfacing logic?
62030. A TTL totem-pole circuit is designed so that the output transistors:
62031. The most common TTL series ICs are:
62032. Fan-out is determined by taking the ________ result(s) of ________.
62033. Which family of devices has the characteristic of preventing saturation during operation?
62034. How many 74LSTTL logic gates can be driven from a 74TTL gate?
62035. What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?
62036. From the following specifications determine the fan-out for the logic family.
62037. Why are the maximum value of VOL and the minimum value of VOH used to determine the noise margin rather than the typical values for these parameters?
62038. What is the standard TTL noise margin?
62039. How can ECL have both a NOR and an OR output?
62040. Which logic family is characterized by a multiemitter transistor on the input?
62041. How is the speed–power product of a logic family determined?
62042. The problem of the VOH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of VIH(min) is usually easily overcome by:
62043. How does the 4000 series of CMOS logic compare in terms of speed and power dissipation to the standard family of TTL logic?
62044. What should be done with unused inputs to a TTL NAND gate?
62045. ----------audit is a recently developed techniques adopted by the co-operative department.
62046. In ECL, the HIGH and LOW levels are determined by which transistor in a differential amplifier is conducting more.
62047. Propagation delay in TTL is due to slow switching speeds.
62048. In TTL the noise margin is between 0.8 V and 0.4 V.
62049. The AND is the simplest of the gates, requiring the least amount of circuitry to implement in TTL.
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