61751. What type of circuit is shown below, and how is the output ordinarily connected?
61752. What type of circuit is represented in the given figure, and which statement best describes its operation?
61753. Which of the following logic families has the highest noise margin?
61754. A "floating" TTL input may be defined as:
61755. Which of the logic families listed below allows the highest operating frequency?
61756. Refer to the given figure. What type of output arrangement is being used for the output?
61757. Refer the given figure. Which of the following describes the operation of the circuit?
61758. What type of logic circuit is shown below and what logic function is being performed?
61759. Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?
61760. What type of circuit is shown below and which statement best describes its operation?
61761. What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?
61762. A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:
61763. What does ECL stand for?
61764. What is unique about TTL devices such as the 74S00?
61765. Refer to the figure given below. What type of device is shown and what input levels are required to turn the LED off?
61766. Generally, the voltage measured at an unused TTL input would typically be measured between:
61767. The IEEE/ANSI notation of an internal underlined diamond denotes:
61768. The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:
61769. The major advantage of TTL logic circuits over CMOS is lower propagation delay.
61770. The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.
61771. The major advantage of CMOS logic circuits over TTL is very low power consumption.
61772. The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
61773. The noise margin for TTL is 0.8 V.
61774. The principal advantage of MOS ICs over TTL ICs is their fast operating speed.
61775. The CMOS series that is pin-compatible with the TTL family is the 4000 series.
61776. The TTL HIGH level source current is higher than the LOW level sinking current.
61777. The maximum output voltage recognized as a LOW by a TTL gate is 2.0 V.
61778. Usually P-MOS and N-MOS circuits are identical with the exception of the voltage polarities.
61779. An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.
61780. ECL gates are noted for their high frequency capability and small output voltage swing.
61781. The logic family with the highest maximum clock frequency is HS-TTL.
61782. The output current capability for a HIGH output condition is called a source current.
61783. The 74XX series TTL operates using saturated switching in which many of the transistors, when conducting, will be in the saturated condition.
61784. The abbreviated designator for a HIGH input voltage is VIH.
61785. A current-sourcing transistor may also be referred to as a pull-down transistor.
61786. Most TTL gates use the totem-pole output arrangement.
61787. The fan-out of CMOS gates is frequency dependent.
61788. The upper transistor of a totem-pole output is OFF when the gate output is low.
61789. The noise immunity of a logic circuit refers to the circuit's ability to tolerate noise by causing spurious charges in the output voltage.
61790. CMOS stands for "complementary metal-oxide semiconductors" and the FETs are normally enhancement mode devices.
61791. A common means for measuring and comparing the overall performance of an IC family is the speed-power product.
61792. The time it takes for a square wave to go from 10% to 90% of its voltage level is called propagation delay.
61793. When the outputs of several standard TTL gates are connected together, the gate outputs produce more fan-out.
61794. A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.
61795. Due to the extremely low power requirements of CMOS logic circuits, any number of CMOS and TTL gates can be interconnected.
61796. The maximum current for a LOW output on a standard TTL gate is 100 A.
61797. Power-supply decoupling uses a radio-frequency capacitor to short out high frequency spikes.
61798. Integrated injection logic offers high component density and is easier to fabricate than TTL.
61799. When the outputs of several open-collector TTL gates are connected together, the gate outputs ________.
61800. Propagation delay is important because ________.
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