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You Are On Multi Choice Question Bank SET 1234

61701. The asynchronous inputs are normally labeled ________ and ________, and are normally active-________ inputs.





61702. Assume a J-K flip-flop has 1s on the J and K inputs. The next clock pulse will cause the output to ________.





61703. In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.





61704. The key to edge-triggered sequential circuits in VHDL is the ________.





61705. The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as a ________.





61706. A gated D latch does not have ________.





61707. Setup time specifies ________.





61708. When the output of the NOR gate S-R flip-flop is Q = 0 and , the inputs are:





61709. A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be ________ mS.





61710. Most people would prefer to use ________ over HDL.





61711. A major drawback to an latch is its ________.





61712. In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.





61713. The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.





61714. The major advantage of a Schmitt trigger input is that it ________.





61715. When the output of the NOR gate S-R flip-flop is in the HOLD state (no change), the inputs are ________.





61716. Regardless of whether you develop a description in AHDL or VHDL, the circuit's proper operation can be verified using a ________.





61717. The 74121 nonretriggerable multivibrator can have the output pulse set by a single external component. This component is a(n) ________.





61718. The signal used to identify edge-triggered flip-flops is ________.





61719. An edge-triggered flip-flop can change states only when ________.





61720. When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________.





61721. The term hold always means ________.


61722. A gated S-R flip-flop goes into the CLEAR condition when ________.





61723. What type of multivibrator is a latch?





61724. HANTEX as the apex society established in:





61725. An astable multivibrator is a circuit that ________.





61726. The inputs on a 7474 D flip-flop are S, R, D, and CLK ________ is/are synchronous.





61727. A flip-flop operation is described as a toggle when the result after a clock is ________.


61728. The asynchronous inputs on a J-K flip-flop ________.





61729. A positive edge-triggered flip-flop will accept inputs only when the clock ________.





61730. If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.





61731. The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.





61732. The action of ________ a FF or latch is also called resetting.





61733. The postponed symbol () on the output of a flip-flop identifies it as being ________.





61734. The advantage of a J-K flip-flop over an S-R FF is that ________.





61735. The ________ is the time interval immediately following the active transition of the clock signal.





61736. A gated S-R flip-flop is in the hold condition whenever ________.





61737. The toggle mode is the mode in which a(n) ________ changes states for each clock pulse.





61738. Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.





61739. Which statement BEST describes the operation of a negative-edge-triggered D flip-flop?





61740. Propagation delay time, tPLH, is measured from the ________.





61741. How is a J-K flip-flop made to toggle?





61742. How many flip-flops are in the 7475 IC?





61743. How many flip-flops are required to produce a divide-by-128 device?





61744. Which of the following summarizes the important features of ECL?





61745. What must be done to interface TTL to CMOS?





61746. What causes low-power Schottky TTL to use less power than the 74XX series TTL?





61747. What are the major differences between the 5400 and 7400 series of ICs?




61748. Which of the following statements apply to CMOS devices?





61749. What must be done to interface CMOS to TTL?





61750. What is the static charge that can be stored by your body as you walk across a carpet?





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