61151. When multiplying 13 × 11 in binary, what is the third partial product?
61152. How many BCD adders would be required to add the numbers 97310 + 3910?
61153. The selector inputs to an arithmetic/logic unit (ALU) determine the:
61154. What is wrong, if anything, with the circuit in the given figure based on the logic analyzer display accompanying the circuit?
61155. Which of the statements below best describes the given figure?
61156. An 8-bit register may provide storage for two's-complement codes within which decimal range?
61157. A full-adder adds ________.
61158. The carry propagation delay in 4-bit full-adder circuits:
61159. An input to the mode pin of an arithmetic/logic unit (ALU) determines if the function will be:
61160. Could the sum output of a full-adder be used as a two-bit parity generator?
61161. In VHDL, what is a GENERATE statement?
61162. Binary subtraction of a decimal 15 from 43 will utilize which two's complement?
61163. Which of the following is the primary advantage of using binary-coded decimal (BCD) instead of straight binary coding?
61164. The contributors of Co-operative idea in England by Robert Owen and:
61165. Convert each of the decimal numbers to two's-complement form and perform the addition in binary. +13 –10 add –7 add +15
61166. Add the following binary numbers. 0010 0110 0011 1011 0011 1100 +0101 0101 +0001 1110 +0001 1111
61167. The carry propagation delay in full-adder circuits:
61168. What is the difference between a full-adder and a half-adder?
61169. The summing outputs of a half- or full-adder are designated by which Greek symbol?
61170. Subtract the following hexadecimal numbers. 47 34 FA –25 –1C –2F
61171. What is the correct output of the adder in the given figure, with the outputs in the order:
61172. The management of joint Stock Company is:
61173. The BCD addition of 910 and 710 will give initial code groups of 1001 + 0111. Addition of these groups generates a carry to the next higher position. The correct solution to this problem would be to:
61174. Subtract the following binary numbers. 0101 1000 1010 0011 1101 1110 –0010 0011 –0011 1000 –0101 0111
61175. Why is a fast-look-ahead carry circuit used in the 7483 4-bit full-adder?
61176. Find the 2's complement of –1101102.
61177. What logic function is the sum output of a half-adder?
61178. The binary adder circuit is designed to add ________ binary numbers at the same time.
61179. An ALU is a multipurpose device capable of providing several different logic operations.
61180. BCD arithmetic is performed using base 10 numbers.
61181. A full adder has a carry-in.
61182. Hexadecimal is a base 4 numbering system.
61183. The solution to the binary problem 00110110 – 00011111 is 00011000.
61184. A binary sum is made up of only 1s and 0s.
61185. Overflow indicators in ALU circuits indicate when add or subtract operations produce results that are too large to fit into four bits.
61186. The inputs of a full adder are labeled A1, B1, and Cin.
61187. Larger number capacities may be obtained from 2-bit adders by paralleling them.
61188. If [A] = 10 and [B] = 01, then [A] + [B] = [ ].
61189. 111010002 is the 2's-complement representation of –24.
61190. The look-ahead-carry adder is slower than the ripple-carry adder because it requires additional logic circuits.
61191. The solution to the binary problem 1011 × 0110 is 01100110.
61192. The solution to the BCD problem 0101 + 0100 is 00001001BCD.
61193. A macrofunction is a self-contained description of a logic circuit with all of its inputs, outputs, and operational characteristics defined.
61194. A half-adder circuit would normally be used each time a carry input is required in an adder circuit.
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