1. Seismic load is checked forresistance.





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MCQ->Seismic load is checked forresistance.....
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MCQ->Refer the given figure. The outputs (Q0–Q3) of the memory are always LOW. The address lines (A0–A7) are checked with a logic probe and all are indicating pulse activity, except for A3, which shows a constant HIGH, and A7, which shows a constant LOW; the select lines, are checked and shows pulse activity, while indicates a constant HIGH. What is wrong, and how can the memory be tested to determine whether it is defective or if the external circuitry is defective?

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MCQ->Refer to the figure given below. The logic function generator being implemented with the multiplexer in this circuit produces a constant LOW on the output. The ABC inputs are checked and appear to be pulsing; also, the 0–7 and EN inputs are checked with the scope and all appear to be at 0 V. A check with the DMM confirms that power is on. What is the problem, and what should be done to correct it?

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