1. In a 3 input NAND gate, the number of states in which output is 1 equals





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MCQ->Assertion (A): When all inputs of a NAND-gate are shorted to get a one input, one output gate, it becomes an inverter.Reason (R): When all inputs of a NAND-gate are at logic 'O' level, the output is at logic 'I' level.

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MCQ->In a 3 input NAND gate, the number of states in which output is 1 equals....
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