Toggle navigation
Home
Article Category
Question Papers
General Knowlege
Popular Pages
Multiple Choice Question in 049
Multiple Choice Question in
Multiple Choice Question in TRADES-INSTRUCTOR---GR-II---SMITHY---TECHNICAL-EDUCATION
Multiple Choice Question in -current-affairs-2016
Multiple Choice Question in 2016
Question Answer in ASSISTANT-PROFESSOR---COMPUTER-SCIENCE-AND-ENGINEERING---TECHNICAL-EDUCATION
Multiple Choice Question in ASSISTANT-PROFESSOR---COMPUTER-SCIENCE-AND-ENGINEERING---TECHNICAL-EDUCATION
Multiple Choice Question in english
Multiple Choice Question in abbreviations-abbreviations-m
Multiple Choice Question in SSC CHSL 7 March 2018 Morning Shift
Multiple Choice Question in 072/2016
Question Answer Bank
Multiple Choice Question Bank
Question Answer Category
Multiple Choice Question Category
Home
->
Multiple Choice Questions
1. A divide by 78 counter can be obtained by
(A): 6 numbers of mod-13 counters
(B): 13 numbers of mod-6 counters
(C): one mod-13 counter followed by mod-6 counter
(D): 13 number of mod-13 counters
Previous Question
Show Answer
Next Question
Add Tags
Report Error
Show Marks
Write Comment
Type in
(Press Ctrl+g to toggle between English and the chosen language)
Post reply
Comments
Tags
Show Similar Question And Answers
QA->Counter claim can be fixed under:....
QA->Unlike most animal cell, which cell generally do not divide ?....
QA->WHICH YEAR IS KNOWN AS YEAR OF THE GREAT DIVIDE REGARDING POPULATION GROWTH IN INDIA....
QA->Who is the author of the Book "Widening Divide" ?....
QA->The Chappell & White classification system is used to divide varieties?....
MCQ->Read the following statements The circuitry of ripple counter is more complex than that of synchronous counter.The maximum frequency of operation of ripple counter depends on the modulus of the counter.The maximum frequency of operation of synchronous counter does not depend on the modulus of the counter. Which of the above statements are correct?....
MCQ->Assertion (A): Divide-64 counter is a Mod-64 counter and divides the input frequency by 64 Reason (R): A Mod 64 counter can be obtained by cascading Mod 16 and Mod 4 counters.....
MCQ->A 12 MHz clock frequency is applied to a cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. The lowest output frequency possible is ________.....
MCQ->4 bit ripple counter and 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then....
MCQ->What will be the output of the program? interface Count { short counter = 0; void countUp(); } public class TestCount implements Count { public static void main(String [] args) { TestCount t = new TestCount(); t.countUp(); } public void countUp() { for (int x = 6; x>counter; x--, ++counter) / Line 14 / { System.out.print(" " + counter); } } }....
×
×
Type The Issue
×
Your Marks
Terms And Service:We do not guarantee the accuracy of available data ..We Provide Information On Public Data.. Please consult an expert before using this data for commercial or personal use
Powered By:Omega Web Solutions
© 2002-2017 Omega Education PVT LTD...
Privacy
|
Terms And Conditions