70602. In a shift left register, shifting a bit by one bit means
70603. If A = B = 1, the outputs P and Q in the given figure are
70604. In the given figure, Y =
70605. Assertion (A): The access time of memory is lowest in the case of DRAM Reason (R): DRAM uses refreshing cycle.
70606. In a 3 input NOR gate, the number of states in which output is 1 equals
70607. Assertion (A): Even if TTL gates and CMOS gates used in a realization have the same power supply of + 5 V, suitable circuit is needed to interconnect themReason (R): VOH, VOL, VIH and VIL of a TTL gave are respectively 2.4, 0.4, 2 and 0.8 V respectively. If supply voltage is + 5 V. VIL and VIH for CMOS gate for the supply voltage of + 5 V are 1.5 V and 3.5 V respectively.
70608. The series 54 H/74 H denotes
70609. For a 4096 x 8 EPROM, the number of address lines is
70610. Assertion (A): A PROM can be used as a synchronous counter Reason (R): Each memory location in a PROM can be read synchronously.
70611. ABCD + AB C D =
70612. Find the output voltage for 011100 in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V.
70613. Binary number 1101 is equal to octal number
70614. Logic analyser is
70615. In the given figure shows a negative logic AND gate. If positive logic is used this gate is equivalent to
70616. The function Y = A B C + AB C + A B C + A BC is to be realized using discrete gates. The inputs available are A, B, C. We need a total of
70617. A 10 bit D/A converter gives a maximum output of 10.23 V. The resolution is
70618. As applied to a flip flop the word edge triggered's means
70619. A NOR gate is a combination of
70620. The 2's complement representation of - 17 is
70621. TTL inverter has
70622. 4 bit ripple counter and 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then
70623. The number of digits in hexadecimal system
70624. Which of these is the most recent display device?
70625. A NOR gate has 3 inputs A, B, C. For which combination of inputs is output HIGH
70626. In 2's complement form, - 2 is
70627. The Boolean function/implemented in the figure using two I/P multiplexers is
70628. A full adder adds
70629. For a Mod 64 parallel counter we need
70630. If the inputs to a 2 input XOR gate are high then, the output is high.
70631. The number of select lines in a 16 : 1 multiplexer are
70632. 9's complement of 5610 is
70633. Am equivalent 2's complement representation of the 2's complement number 1101 is
70634. In a 7 segment display the segments a, c, d, f, g are lit. The decimal number displayed will be
70635. The minimum number of comparators required to build an 8 bit flash ADC is
70636. For a Mod-64 synchronous counter the number of flip flops and AND gates needed is
70637. A 4 bit DAC gives an output of 4.5 V for input of 1001. If input is 0110, the output is
70638. Which of the following characteristic are necessary for a sequential circuit? It must have 6 gatesIt must have feedbackIts output should depend on past value Which of the above statements are correct?
70639. 10112 x 1012 = __________ 10
70640. For the logic circuit of the given figure the simplified Boolean equation
70641. A combination circuit is one in which the output depends on
70642. 718 = __________ .
70643. Boolean expression for the output of XNOR (Equivalent) logic gate with inputs A and B is
70644. An SR flip flop can be built using NOR gates or NAND gates.
70645. In the given figure RC = RL = 1 kΩ, then V0 =
70646. A 14 pin NOT gate 1C has __________ NOT gates.
70647. F's complement of (2BFD)hex is
70648. Assertion (A): Master slave JK flip flop is commonly used in high speed synchronous circuitry Reason (R): Master slave JK flip flop uses two JK flip flops in cascade.
70649. Inputs A and B of the given figure are applied to a NAND gate. The output is LOW
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