61051. The terminal count of a modulus-11 binary counter is ________.
61052. List which pins need to be connected together on a 7493 to make a MOD-12 counter.
61053. How can a digital one-shot be implemented using HDL?
61054. Which of the figures (a to d) is the DeMorgan equivalent of Figure (e)?
61055. means the document itself produced for the inspection of the Court.
61056. In VHDL, the mode of a port does not define:
61057. Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0?
61058. Which of the examples below expresses the distributive law?
61059. Which of the examples below expresses the associative law of addition:
61060. How are the statements between BEGIN and END not evaluated in VHDL?
61061. Which logic gate does this truth table describe?
61062. For a 3-input NAND gate, with the input waveforms as shown below, which output waveform is correct?
61063. Which of the figures given below represents a NAND gate?
61064. Which timing diagram shown below is correct for an inverter?
61065. A NOR gate with one HIGH input and one LOW input:
61066. A NAND gate has:
61067. Which of the figures given below represents an OR gate?
61068. The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n):
61069. Which of the symbols shown below represents an AND gate?
61070. For a three-input AND gate, with the input waveforms as shown below, which output waveform is correct?
61071. An OR gate with inverted inputs functions as:
61072. The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a:
61073. Which step in this reduction process is using DeMorgan's theorem?
61074. For a three-input NOR gate, with the input waveforms as shown below, which output waveform is correct?
61075. A LOW placed on the input of an inverter will produce a HIGH output.
61076. The SUBDESIGN section defines the input and output of the logic circuit block.
61077. The NAND gate is an example of combinational logic.
61078. The symbol shown below is an AND gate.
61079. The complement of 1 is 0.
61080. In VHDL, local signals are declared in the VARIABLE section, which is placed between the SUBDESIGN section and the logic section.
61081. The given figure shows the correct logic implementation of the distributive law.
61082. Boolean algebra was first applied to the analysis of digital circuits by Claude Shannon at Stanford University.
61083. The application of DeMorgan's theorems to a Boolean expression with double and single inversions produces a resultant expression that contains only single inverter signs over single variables.
61084. The timing diagram for a two-input NAND gate is shown below. The gate is working correctly.
61085. The truth table shown below describes the operation of a NOR gate.
61086. A two-input NAND gate has inputs of 1 and 0; the output is 0.
61087. A NAND gate consists of an AND gate and an OR gate connected in series with each other.
61088. In an expression containing both AND and OR operations, the AND operations are performed first (unless parentheses indicate otherwise).
61089. In a text-based language, the circuit being described must be given a name.
61090. The effect of an inverted output being connected to the inverting input of another gate is to effectively eliminate one of the inversions, resulting in a single inversion.
61091. A minimum of three universal NOR gates would be required to perform the logical operation of a 2-input AND gate.
61092. The Boolean expression for a three-input AND gate is X = ABC.
61093. Output logic levels for certain input conditions of a logic circuit may often be determined without using the Boolean expression.
61094. The comments in ADHL are enclosed between # characters.
61095. The expressions, , are equivalent.
61096. The output of a NAND gate is the inverse of the output for an AND gate for all possible input combinations.
61097. NOR gates can be used to construct AND gates.
61098. The commutative law of Boolean addition states that A + B = A · B.
61099. The figure given below is an example of the implementation of AND-OR-INVERT logic.
61100. The OR gate performs like two switches wired in a series.
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