62956. How can parallel data be taken out of a shift register simultaneously?
62957. What is meant by parallel load of a shift register?
62958. What does the output enable do on the 74395A chip?
62959. To operate correctly, starting a ring shift counter requires:
62960. In a 6-bit Johnson counter sequence there are a total of how many states, or bit patterns?
62961. A modulus-12 ring counter requires a minimum of ________.
62962. Stepper motors have become popular in digital automation systems because ________.
62963. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.
62964. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
62965. A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________.
62966. With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________.
62967. An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________.
62968. A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?
62969. The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?
62970. If an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse?
62971. How would a latch circuit be used in a microprocessor system?
62972. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse.
62973. How many clock pulses will be required to completely load serially a 5-bit shift register?
62974. How is a strobe signal used when serially loading a shift register?
62975. An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?
62976. What are the three output conditions of a three-state buffer?
62977. The primary purpose of a three-state buffer is usually:
62978. What is the difference between a ring shift counter and a Johnson shift counter?
62979. What is a recirculating register?
62980. When is it important to use a three-state buffer?
62981. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.
62982. In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________.
62983. The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ________.
62984. By adding recirculating lines to a 4-bit parallel-in, serial-out shift register, it becomes a ________, ________, and ________-out register.
62985. What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time?
62986. When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock frequency is ________.
62987. Ring shift and Johnson counters are:
62988. What is the difference between a shift-right register and a shift-left register?
62989. What is a transceiver circuit?
62990. A 74HC195 4-bit parallel access shift register can be used for ________.
62991. Which type of device may be used to interface a parallel data format with external equipment's serial format?
62992. What is the function of a buffer circuit?
62993. What is the preset condition for a ring shift counter?
62994. Which is not characteristic of a shift register?
62995. To keep output data accurate, 4-bit series-in, parallel-out shift registers employ a ________.
62996. With a 50 kHz clock frequency, six bits can be serially entered into a shift register in ________.
62997. Another way to connect devices to a shared data bus is to use a ________.
62998. To serially shift a nibble (four bits) of data into a shift register, there must be ________.
62999. Computers operate on data internally in a ________ format.
63000. In a 4-bit Johnson counter sequence there are a total of how many states, or bit patterns?
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